We will see the first implementation of “Zen” on a very powerful APU that will feature 16 physical “Zen” cores, 32 logical CPUs enabled with SMT, 512 KB of dedicated L2 cache per core and 32 MB of L3 cache. We will also see AMD do some string cleaning of the CPU’s ISA instruction set, removing underused instruction sets and introducing new ones.
AMD has released developer documentation for an upcoming processor they are working on. The way that it is described in the documentation it is a chip with 8 modules, working out to 16 cores on a single piece of silicon. It is being referred to as the Family 15h Models 30h – 3fh.