It is widely known that the six-core Sandy Bridge-E Core i7 processor was actually an eight-core Sandy Bridge-EP Xeon E5 that has two cores and outside QPI turned off. With the Ivy Bridge-E Core i7’s about to launch we wonder if the same holds true?
The Ivy Bridge-EP Xeon E5 v2 has three different dies in its family. One is a native, compact, six-core die with 15 MB of L3 cache. The other two are a 10-core 25 MB L3 cache and a 12-core 30 MB L3 cache. The smallest die is the base for the Ivy Bridge-E Core i7 Series. This means there will be no turned off cores off of a larger die. You still will have a quad-channel DDR3-1866 memory controller, although the two QPI channels from the Xeon die are turned off.
This will be a big plus compared to the old crippled eight-core 32 nm die with the cores disabled. These chips should have very good overclocking potential, especially since Intel had an extra year to solve any of the leakage problems on the 22 nm FinFET process. Also we are guessing that Intel will continue to use the soldered on heat spreader solution rather than the cheap toothpaste that we have seen on the desktop Ivy Bridge chips.
Oct 14, 2014 0
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